Flash memories are widely used in numerous applications. The conventional flash memory permits a group of memory cells to be simultaneously programmed (e.g., written) and/or erased through a single operation. Generally, data can be written to and/or erased from a memory cell a finite number of times. Flash memories usually store data in individual memory cells, and the memory cells generally are made up of floating-gate transistors. In a single-level cell (SLC) flash memory, one bit of data is stored in each cell. A multi-level cell (MLC) flash memory, on the other hand, stores more than one bit of data in each cell, with the multi-level referring to the multiple levels of electrical charge used to store multiple bits per memory cell. Flash memory arrangements can be made up of one or both types of cells.
When cycling (programming and erasing, repeatedly) is performed within a NAND flash memory architecture, it has been determined that errors occur more frequently in the data pages closest to a source select line (SSL) and the data pages closest to a drain select line (DSL). Likewise, errors from baking (data retention) also tend to occur more frequently in the data pages closest to the SSL and the DSL. This is generally due to voltage disturbances and stress that are provided by the SSL and the DSL.
The description in this section is related art, and does not necessarily include information disclosed under 37 C.F.R. 1.97 and 37 C.F.R. 1.98. Unless specifically denoted as prior art, it is not admitted that any description of related art is prior art.